Software Defined Radio (SDR)

Empowering next-generation wireless innovation with scalable, FPGA-powered SDR platforms. iWave delivers high-performance solutions built on AMD and Altera FPGAs for defense, 5G, satellite communication, and beyond.

Design Software Defined Radio with RFSoC

Software Defined Radio (SDR) is a transformative technology that replaces traditional analog radio components with digital signal processing controlled by software.

Two defining characteristics of the RFSoC are the extremely high sampling rates that it can support up to multiple Gsps and the wide analogue bandwidths that its RF-ADCs can capture. Similarly, the RF-DACs can generate extremely wideband signal. In the context of SDR design, this is incredibly powerful; an SDR can convert between the digital and analogue domains at RF frequencies, enabling a large set of wireless standards and technologies to be supported using an ‘almost all digital radio” architecture

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Why design with RFSoC System on Module

As RFSoCs integrate high-speed analog and digital processing into a single device, choosing a System on Module (SoM) significantly accelerates development and simplifies complex designs. These SoMs manage challenges such as power sequencing, signal integrity, and high-speed layout, allowing developers to focus on application-level development.

In addition, RFSoC SoMs offer a compact, production-ready solution with pre-validated interfaces such as JESD204B, multi-Gsps ADCs/DACs, and high-speed memory

Scalability across System on Modules

The System on Modules are designed for seamless scalability, supporting migration from Gen1 to Gen3 devices, including ZU25/ZU29/ZU39/ZU43/ZU48 and ZU49DR, without changes to the carrier board. Both modules feature the same dual 400-pin high-speed Board-to-Board (B2B) connectors, enabling full pin-compatibility on a shared development platform. 

This allows developers to switch between SoMs with different RF channel counts or device grades without modifying their carrier board design, reducing time-to-market and maximizing design reuse